CompactRISC

In this article, we are going to delve deeper into the topic of CompactRISC and explore all its facets. From its origin to its impact on today's society, CompactRISC has been the subject of debate and study in various disciplines. Throughout history, CompactRISC has played a crucial role in people's lives, influencing the way they think, act and relate to their environment. Through this article, we will look at the different perspectives on CompactRISC and examine how it has evolved over time. In addition, we will explore its relevance today and its projection into the future. Get ready to enter the exciting world of CompactRISC and discover everything this theme has to offer.

CompactRISC is a family of instruction set architectures from National Semiconductor. The architectures are designed according to reduced instruction set computing principles, and are mainly used in microcontrollers. The subarchitectures of this family are the 16-bit CR16 and CR16C and the 32-bit CRX.

Architectures

Features of CR16 family: compact implementations (less than 1 mm2 with 250 nm), addressing of 2 MB (221), frequencies up to 66 MHz, hardware multiplier for 16-bit integers.

It has complex instructions such as bit manipulation, saving/restoring and push/pop of several registers with single command.

CR16 has 16 general purpose registers of 16 bits, and address registers of 21 bits wide. There are 8 special registers: program counter, interrupt stack pointer ISP, interrupt vector address register INTBASE, status register PSR, configuration register and 3 debug registers. Status register implements flags: C, T, L, F, Z, N, E, P, I.

Instructions are encoded in two-address form in several formats, usually they have 16-bit encoding, but there are two formats for medium immediate instructions with length of 32-bit. Typical opcode length is 4 bits (bits 9–12 of most encoding types. Basic encoding formats are:

  • Register-to-register,
  • Short 5-bit immediate value to register,
  • Medium immediate of 16-bit value to register (32-bit encoding),
  • Load/store relative with short 5-bit displacement (2-bit opcode),
  • Load/store relative with medium 18-bit displacement (32-bit encoding, 2-bit opcode).

CR16C comes with a different opcode encoding format, has 23–32-bit-wide address registers and provides two 32-bit general purpose registers.

CR16 implements traps and interrupts. Implementations of CR16 has three-stage pipeline: fetch, decode, execute.

CR16 products

CR16 was used in several National Semiconductor microcontrollers, and since 2001 integrated microcontrollers were available having built-in flash memory. Since 2007 CR16-based IP was available to licensing

References

  1. ^ a b c d e f Brunvand, Erik. "National Semiconductor CR16, Compact RISC Processor, Baseline ISA and Beyond" (PDF). CS/EE 3710. University of Utah. Retrieved 3 December 2016.
  2. ^ von Hagen, William (2011). The Definitive Guide to GCC. Apress. p. 422. ISBN 9781430202196.
  3. ^ "CR16C Programmer's Reference Manual" (PDF).
  4. ^ Graham, Jeanne (2001-02-22). "National Semi's 16-bit MCU integrates flash, analog". EETimes. Retrieved 3 December 2016.
  5. ^ "National's 16-bit RISC MCU touts high-endurance flash". EETimes. 2001-03-13. Retrieved 3 December 2016.
  6. ^ Hammerschmidt, Christoph (2007-02-21). "NatSemi taps IPextreme for embedded IP resale". EETimes. Retrieved 3 December 2016.

External links